1. Field of the Invention
The present invention relates to a wiring board and its manufacturing method.
2. Discussion of the Background
Japanese Laid-Open Patent Publication Nos. 2007-109965 and 2002-64161 each describe a semiconductor device having a semiconductor chip and a wiring board.
A semiconductor device described in Japanese Laid-Open Patent Application No. 2007-109965 has an insulation layer (outermost layer) formed on the above semiconductor chip and a columnar conductor which is formed in the insulation layer and is an passage from an electrode pad of the semiconductor chip to the upper surface of the insulation layer. In such a semiconductor device, the columnar conductor is formed by inserting a conductive rod into a hole formed in the insulation layer, sealing the conductive rod with resin, and performing CMP (chemical mechanical polishing) on surfaces of the insulation layer and the columnar rod.
On the other hand, the semiconductor device described in Japanese Laid-Open Patent Publication No. 2002-64161 has an insulation layer formed on the semiconductor chip, and a conductor (via conductor) filled in a via hole formed in the insulation layer. The via conductor is the electrical passage from an electrode pad of the semiconductor chip through an outermost layer.
The contents of Japanese Laid-Open Patent Publication Nos. 2007-109965 and 2002-64161 are incorporated herein by reference in their entirety in the present application.